Design Services

1CRYPTO provides an almost complete range of design services for our prospective customers.

Among our core competencies are:

  • Developing foundry qualified Process Design Kits (PDKs), (CAD programming, layout up to silicon verification)
  • Mixed Signal and Analog IP design and custom Analog Layout
  • RTL-to-GDSII implementation
  • Turn-key services to manage our customer’s IC fabrication results, test related and packaging issues due to good proximity to these outsource facilities

We believe in design flexibility with our prospective clients. We are experienced in working in tandem with customers for joint full chip design and development as well as IP block outsourcing. A strict non-disclosure agreement will securely protect all our customers sensitive and propriety information when engaging with us at all points of the IC design flow as we strongly believe in and respect IP ownership and protection.

CMOS Mix Signal Design

  • We are experienced in CMOS Analog IP design up to the 0.13um node.
  • Some basic blocks successfully designed and silicon verified: PLL, ADCs, LED Drivers, Battery protection, ChargePumps & DC-DC Converters.

FPGA and Embedded System Design

  • Exposure ranging from digital design architecture to MicroBlaze, PowerPC, ARM CortexA9 & embedded Linux.
  • Excellent understanding design issues such as a processor architecture, timing closure flow, high speed interface, digital signal processing and Zynq All Programmable SoC.

Digital RTL to GDS II Flow Design

  • RTL Design: RTL code qualification to make the designs convenient for reuse, implementation, and porting.
  • Timing Closure: Architecture driven and hierarchically implemented designs for easy timing convergence
  • DFT : Internal scan, Boundary scan, memory built-in self-test (MBIST) and at-speed test solutions for VDSM.
  • Power: MSMV (Multi-Supply Multi-Voltage) solution which includes DVFS (dynamic voltage frequency scaling), power shutoff and voltage island solutions co-working with multi-Vt, and ICG solutions.
  • Physical Implementation: Seamless integrated platform with floor plans, clock tree optimization, RC extraction, antenna optimization and LVS/DRC/ERC physical verification, as well as cost effective ECO solutions

Semiconductor Knowledge Training by Certified Trainers

  • Xilinx Certified Instructor for Vivado, Advanced FPGA Design, Connectivity, DSP and Embedded Systems courses.
  • Art of Analog Layout and Semiconductor CMOS process flow description